1. Field of the Invention
This invention relates to a semiconductor device capable of adjusting the intervals between wires for electrically connecting pads and leads and particularly avoiding electrical contacts between the wires at the corners of the semiconductor device.
2. Description of the Related Art
A wire-bonding method for electrically connecting pads and leads provided within a semiconductor device by using micro-fabricated conductors or wires is known in the fabrication of a semiconductor apparatus or unit. Since the wire-bonding method is easy to connect them and provides high reliability, it is now widespread. In recent years, the degree of integration of the semiconductor device has greatly increased to realize high added values. With its increase, a so-called multi-pin configuration is now in progress, and the numbers of pads and leads and the number of conductors or wires for electrically connecting them increase. Wire-bonding needs to electrically connect several tens to a few hundred of pads arranged along the periphery of a semiconductor device having four sides given in a few millimeters, for example and leads by wires respectively and avoid an electrical short circuit and a failure in operation due to electrical contacts between the respective wires.
Japanese Patent Application Laid-Open No. Hei 4-269856 has heretofore been disclosed firstly as a technique that meets such a demand. Namely, the semiconductor device disclosed therein takes such a configuration that inner pads and outer pads are arranged in two rows in zigzags along the periphery of the semiconductor device to provide the large number of pads along the periphery of the semiconductor device. In the semiconductor device, the inner pads and the outer pads have substantially the same sizes and are alternately placed half-pitch apart.
Further, Japanese Patent Application Laid-Open No. Hei 6-53413 has also heretofore been disclosed as a technique which meets such a demand. Namely, the semiconductor device disclosed herein takes a configuration in which inner pads and outer pads are arranged in two rows in zigzags along the periphery of the semiconductor device. In the semiconductor device, any of the inner and outer pats is shaped in square form but they are different in size from one another. In the example disclosed in the present patent publication, the outer pads are greater than the inner pads in size. The outer large pads are used upon wire bonding and both the inner and outer pads are used upon Tape Automated Bonding to provide an improvement in general versatility.
However, as in the case of the semiconductor device disclosed in Japanese Patent Application Laid-Open No. Hei 4-269856, the height of the semiconductor device becomes inevitably high when the wires for electrically connecting the inner pads and the leads and the wires for electrically connecting the outer pads and the leads are made different in height from each other. Therefore, the present semiconductor device cannot be applied to a thin package that will be mainstream. In the present semiconductor device as well, the adjoining wires become substantially parallel at portions or areas near the center line of the semiconductor device but are inclined as they approach the corner of the semiconductor device, thereby causing a greater overlap with each other. Therefore, the semiconductor device is easy to cause an electrical failure and an assembly failure incident to its failure. Further, a check or the like for the semiconductor device falls into difficulties. The leads must be specifically designed, thereby increasing their development costs.
In the semiconductor device disclosed in Japanese Patent Application Laid-Open No. Hei 6-53413, the wire-bonding pads are outwardly disposed in only one row and respectively shaped in the form of a considerable large square. Accordingly, the semiconductor device cannot meet the recent multi-pin configuration.
Thus, there has been a demand for the provision of a semiconductor device capable of adjusting the intervals between adjacent wires for electrically connecting pads and leads and particularly avoiding electrical contacts between the wires at the corners of the semiconductor device.